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Semiconductor Devices And Logic Gates

MHT CET 2026 15th April Evening Shift

MCQ+1 / -02026
In the diagram shown, the resistance between points A and B is '$R_1$' when an ideal diode D is forward biased and is '$R_2$' when ideal diode D is reverse biased. The ratio $R_1 / R_2$ is
MHT CET 2026 15th April Evening Shift Physics - Semiconductor Devices and Logic Gates Question 16 English

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