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Semiconductor Devices And Logic Gates

MHT CET 2026 15th April Evening Shift

MCQ+1 / -02026
In the logic circuit diagram, when all the four inputs, A, B, C, D are 'one' the outputs $Y_1$, $Y_2$, $Y_3$ are respectively (1, 1, 0). When the inputs A and C are changed to zero and B and D are still 'one', then the outputs $Y_1$, $Y_2$, $Y_3$ are respectively change to
MHT CET 2026 15th April Evening Shift Physics - Semiconductor Devices and Logic Gates Question 17 English

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