Mht Cet
Semiconductor Devices And Logic Gates
MHT CET 2025 19th April Evening Shift
MCQ+1 / -02025
In a given logic circuit, the output Y when all the three inputs $\mathrm{A}, \mathrm{B}, \mathrm{C}$ are first low and then high will be respectively

Mht Cet
MHT CET 2025 19th April Evening Shift
In a given logic circuit, the output Y when all the three inputs $\mathrm{A}, \mathrm{B}, \mathrm{C}$ are first low and then high will be respectively
