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Semiconductor Devices And Logic Gates

MHT CET (PCB) 2025 9th April Evening Shift

MCQ+1 / -02025

The output Y of a given logic circuit is (For inputs $\mathrm{A}, \mathrm{B}$ and C )

MHT CET (PCB) 2025 9th April Evening Shift Physics - Semiconductor Devices and Logic Gates Question 1 English

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