Semiconductor Devices And Logic Gates

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$$ \begin{array}{|l|l|l|} \hline \text { A } & \text { B } & \text { Y } \\ \hline 0 & 0 & 1 \\ \hline 1 & 0 & 0 \\ \hline 0 & 1 & 0 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $$

$$ \begin{array}{|c|c|c|} \hline A & B & Y \\ \hline 0 & 0 & 0 \\ \hline 1 & 0 & 1 \\ \hline 0 & 1 & 1 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $$

$$ \begin{array}{|l|l|l|} \hline \mathbf{A} & \mathbf{B} & \mathbf{Y} \\ \hline 0 & 0 & 1 \\ \hline 1 & 0 & 1 \\ \hline 0 & 1 & 1 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $$