Mht Cet
Semiconductor Devices And Logic Gates
MHT CET 2022 11th August Evening Shift
MCQ+1 / -02022
For a NAND gate, the inputs and outputs are given below.
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| Input A | Input B | Output Y |
|---|---|---|
| 0 | 1 | \(\mathrm{C}\) |
| 0 | 0 | \(\mathrm{D}\) |
| 1 | 0 | \(\mathrm{E}\) |
| 1 | 1 | \(\mathrm{F}\) |
The values taken by C, D, E, F are respectively